1. Field of the Invention
The present invention relates to a method of forming a floating gate, a non-volatile memory device using the same, and a method of fabricating the non-volatile memory device. More particularly, the present invention relates to a method of forming a floating gate, a non-volatile memory device using the same, and a method of fabricating the non-volatile memory device, in which the floating gate which uses nano-crystals of nano-size whose density and size can be easily adjusted, is formed and the nano-crystals are formed using micelles without seeking heat treatment of high-temperature, so that a high-temperature heat treatment process that may raise a problem such as a change in a membranous feature, can be omitted, and an oxide film is formed of a substance having a high dielectric constant, so that a higher electric field can be applied under an identical voltage.
2. Description of the Related Art
According to development of a semiconductor device technology, semiconductor devices, for example, semiconductor memory devices, or thin film transistor-liquid crystal displays (TFT-LCD's) are tending high integrated and miniaturized.
Semiconductor memory devices are largely classified into a volatile memory device such as a dynamic random access memory (DRAM) and a static random access memory (SRAM) in which stored data is lost if electric power is interrupted, and a non-volatile memory device in which stored data is kept even if electric power is temporarily interrupted.
Non-volatile memory devices have a substantially limitless cumulative capacity, respectively. A demand for flash memory devices that enable data to be electrically input and output, for example, an electrically erasable and programmable ROM is increasing.
A flash memory device which is one of non-volatile memory devices can be largely classified into a floating gate type flash memory device and SONOS (Silicon-Oxide-Nitride-Oxide-Semiconductor) type flash memory device according to a charge storing structure.
The floating gate type flash memory device generally has a vertical deposition style multi-layer gate structure having a floating gate on a silicon substrate, and the multi-layer gate structure includes at least one tunnel oxide film or dielectric film, a floating gate formed on the tunnel oxide film, and a control gate formed on the floating gate.
The floating gate type flash memory device applies a proper voltage to the control gate and the substrate, to thus make electrons flow in/drain from the floating gate and to thereby record/delete data. The dielectric film maintains the charges charged in the floating gate.
The SONOS type flash memory device includes a source electrode and a drain electrode which are formed in a silicon substrate, a tunnel oxide film which is deposited on the upper surface of the silicon substrate, a nitride film which is deposited on the upper surface of the tunnel oxide film, an interception oxide film which is formed on the upper surface of the nitride film, and a gate electrode which is formed on the upper surface of the interception oxide film, in which the tunnel oxide film, the nitride film, and the interception oxide film are generally called an ONO (Oxide/Nitride/Oxide) film.
The SONOS type flash memory device can function as a memory device that stores information in which electrons are captured in charge defects formed in the inside of the nitride film formed on the upper surface of the tunnel oxide film. However, it is hard to adjust or control the number of the charge defects of the inside of the nitride film to capture electrons.
Meanwhile, a study tending to use nano-crystals whose particle density and size can be easily controlled as a floating gate in the floating gate type flash memory device is in progress.
In order to form such nano-crystals on a tunnel oxide film of silicon substrate, a high-temperature heat treatment process at 850° C. or higher is needed.
However, when a high-temperature heat treatment process proceeds to form nano-crystals in a silicon substrate, a film quality characteristic of each component (for example, a tunnel oxide film) may change according to an interface reaction and defect. Problems such as components of various film qualities and unnecessary diffusion of ions due to an ion implantation process may occur, to thus deteriorate characteristics of the components.
Therefore, a technology of manufacturing a floating gate type flash memory device that can prevent problems which may be caused by a high-temperature heat treatment process while taking the merits of nano-crystals, by using nano-crystals whose density and size can be easily controlled in a floating gate which floats electric charges, is required.
Meanwhile, a floating gate type flash memory device that can prevent a bridge between gates while sufficiently securing an overlay margin between an active area that is defined in a semiconductor substrate and a floating gate was proposed in Korean Laid-open Patent Publication No. 2005-0002304.
In the case of the technology proposed in Korean Laid-open Patent Publication No. 2005-0002304, an overlay margin between a floating gate and an active area of a semiconductor substrate can be secured at maximum without causing a decrease of a coupling ratio between the floating gate and a control gate, to accordingly enhance reliability of the semiconductor device. However, no method of solving a problem which may be caused by a high-temperature heat treatment process while using nano-crystals as a floating gate is disclosed or taught.
In addition, a method of enhancing characteristics of a memory device should be presented, in which an oxide film having a higher dielectric constant than that of a silicon oxide film or a silicon oxynitride film is used as an oxide film of a non-volatile memory device, so that a larger electric field is applied at an identical voltage.